Current: read from register1..15 pop from stack1,2,3 write to register1..15 push to stack1,2,3 read from RAM write to RAM do computation [0..255] jump relative [internal] Addressing modes: [operand] [operand][indexed] [internal] [register] [constant] 5:3 microcode instruction? 4:4 <-> 4:2:2 or ad hoc instruction decoder places instruction operands or zero in irA, irB, irC, irD